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ltm4609 1 4609fc features a pplications description 36v in , 34v out high effciency buck-boost dc/dc module regulator the ltm ? 4609 is a high effciency switching mode buck- boost power supply. included in the package are the switching controller, power fets and support components. operating over an input voltage range of 4.5v to 36v, the ltm4609 supports an output voltage range of 0.8v to 34v, set by a resistor. this high effciency design delivers up to 4a continuous current in boost mode (10a in buck mode). only the inductor, sense resistor, bulk input and output capacitors are needed to fnish the design. the low profle package enables utilization of unused space on the bottom of pc boards for high density point of load regulation. the high switching frequency and current mode architecture enable a very fast transient response to line and load changes without sacrifcing stability. the ltm4609 can be frequency synchronized with an external clock to reduce undesirable frequency harmonics. fault protection features include overvoltage and foldback current protection. the dc/dc module ? regulator is offered in small thermally enhanced 15mm 15mm 2.82mm lga and 15mm 15mm 3.42mm bga pack- ages. the ltm4609 is rohs compliant with pb-free fnish. l , lt, ltc, ltm, linear technology, the linear logo, module, burst mode and polyphase are registered trademarks and no r sense is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. 30v/2a buck-boost dc/dc module regulator with 6.5v to 36v input n single inductor architecture allows v in above, below or equal to v out n wide v in range: 4.5v to 36v n wide v out range: 0.8v to 34v n i out : 4a dc (10a dc in buck mode) n up to 98% effciency n current mode control n power good output signal n phase-lockable fixed frequency: 200khz to 400khz n ultrafast transient response n current foldback protection n output overvoltage protection n rohs compliant with pb-free finish: gold finish lga (e4) or sac 305 bga (e1) n small surface mount footprint, low profle (15mm 15mm 2.82mm) lga and (15mm 15mm 3.42mm) bga packages n telecom, servers and networking equipment n industrial and automotive equipment n high power battery-operated devices effciency and power loss vs input voltage t ypical a pplication v out fcb run sw1 sw2 r sense sense ? ss v fb sgnd pllin ltm4609 5.6h 2.74k 10f 50v 330f 50v 4609 ta01a v out 30v 2a clock sync v in pgnd v in 6.5v to 36v 0.1f 10f 50v + on/off sense + r2 15m 2 8 99 98 97 96 95 94 93 91 92 6 5 4 3 2 1 0 20 32 4609 ta01b 12 16 24 28 36 v in (v) efficiency (%) power loss (w) efficiency power loss
ltm4609 2 4609fc p in c on f iguration a bsolute maxi m u m r atings v in ............................................................. C0.3v to 36v v out ............................................................. 0.8v to 36v intv cc , extv cc , run, ss, pgood .............. C0.3v to 7v sw1, sw2 (note 7) ...................................... C 5v to 36v v fb , comp ................................................ C0.3v to 2.4v fcb, stbymd ....................................... C 0.3v to intv cc pllin ........................................................ C0.3v to 5.5v (note 1) lga package 141-lead (15mm 15mm 2.82mm) sw2 (bank 2) v in (bank 1) r sense (bank 3) comp pllfltr pllin sw1 (bank 4) v out (bank 5) intv cc extv cc pgood v fb pgnd (bank 6) sense + stbymd top view 1 2 3 4 5 6 7 8 109 11 12 l k j h g f e d c b m a sssense ? sgnd run fcb t jmax = 125c, v jcbottom = 4c/w, weight = 1.5g bga package 141-lead (15mm 15mm 3.42mm) sw2 (bank 2) v in (bank 1) r sense (bank 3) comp pllfltr pllin sw1 (bank 4) v out (bank 5) intv cc extv cc pgood v fb pgnd (bank 6) sense + stbymd top view 1 2 3 4 5 6 7 8 109 11 12 l k j h g f e d c b m a sssense ? sgnd run fcb t jmax = 125c, v jcbottom = 4c/w, weight = 1.7g lead free finish part marking* package description temperature range (note 2) ltm4609ev#pbf ltm4609v 141-lead (15mm 15mm 2.82mm) lga C40c to 85c ltm4609iv#pbf ltm4609v 141-lead (15mm 15mm 2.82mm) lga C40c to 85c ltm4609mpv#pbf ltm4609v 141-lead (15mm 15mm 2.82mm) lga C55c to 125c ltm4609ey#pbf ltm4609y 141-lead (15mm 15mm 3.42mm) bga C40c to 85c ltm4609iy#pbf ltm4609y 141-lead (15mm 15mm 3.42mm) bga C40c to 85c ltm4609mpy#pbf ltm4609y 141-lead (15mm 15mm 3.42mm) bga C55c to 125c consult ltc marketing for parts specifed with wider operating temperature ranges. *the temperature grade is identifed by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/ (see table 6 pin assignment) o r d er i n f or m ation pllfltr .................................................... C0.3v to 2.7v operating t emperature range (note 2) e- and i-grades .................................... C 40c to 85c mp-grade ........................................... C55c to 125c junction t emperature ........................................... 125c storage t emperature range ................... C 55c to 125c solder temperature (note 3) ................................. 245c
ltm4609 3 4609fc the l denotes the specifcations which apply over the specifed operating temperature range (note 2), otherwise specifcations are at t a = 25c, v in = 12v, per typical application (front page) confguration. symbol parameter conditions min typ max units input specifcations v in(dc) input dc voltage l 4.5 36 v v in(uvlo) undervoltage lockout threshold v in falling (C40c to 85c) v in falling (C55c to 125c) l l 3.4 3.4 4 4.5 v v i q(vin) input supply bias current normal standby shutdown supply current v run = 0v, v stbymd > 2v v run = 0v, v stbymd = open 2.8 1.6 35 60 ma ma a output specifcations i outdc output continuous current range (see output current derating curves for different v in , v out and t a ) v in = 32v, v out = 12v v in = 6v, v out = 12v 10 4 a a v fb /v fb(nom) reference voltage line regulation accuracy v in = 4.5v to 36v, v comp = 1.2v (note 4) 0.002 0.02 %/v v fb /v fb(load) load regulation accuracy v comp = 1.2v to 0.7v v comp = 1.2v to 1.8v (note 4) l l 0.15 C0.15 0.5 C0.5 % % switch section m1 t r turn-on time (note 5) drain to source voltage v ds = 12v, bias current i sw = 10ma 50 ns m1 t f turn-off time drain to source voltage v ds = 12v, bias current i sw = 10ma 40 ns m3 t r turn-on time drain to source voltage v ds = 12v, bias current i sw = 10ma 25 ns m3 t f turn-off time drain to source voltage v ds = 12v, bias current i sw = 10ma 20 ns m2, m4 t r turn-on time drain to source voltage v ds = 12v, bias current i sw = 10ma 20 ns m2, m4 t f turn-off time drain to source voltage v ds = 12v, bias current i sw = 10ma 20 ns t 1d m1 off to m2 on delay (note 5) drain to source voltage v ds = 12v, bias current i sw = 10ma 50 ns t 2d m2 off to m1 on delay drain to source voltage v ds = 12v, bias current i sw = 10ma 50 ns t 3d m3 off to m4 on delay drain to source voltage v ds = 12v, bias current i sw = 10ma 50 ns t 4d m4 off to m3 on delay drain to source voltage v ds = 12v, bias current i sw = 10ma 50 ns mode transition 1 m2 off to m4 on delay drain to source voltage v ds = 12v, bias current i sw = 10ma 220 ns mode transition 2 m4 off to m2 on delay drain to source voltage v ds = 12v, bias current i sw = 10ma 220 ns m1 r ds(on) static drain-to-source on-resistance bias current i sw = 3a 10 m m2 r ds(on) static drain-to-source on-resistance bias current i sw = 3a 14 20 m m3 r ds(on) static drain-to-source on-resistance bias current i sw = 3a 14 20 m m4 r ds(on) static drain-to-source on-resistance bias current i sw = 3a 14 20 m oscillator and phase-locked loop f nom nominal frequency v pllfltr = 1.2v 260 300 330 khz f low lowest frequency v pllfltr = 0v 170 200 220 khz e lectrical c haracteristics
ltm4609 4 4609fc e lectrical c haracteristics the l denotes the specifcations which apply over the specifed operating temperature range (note 2), otherwise specifcations are at t a = 25c, v in = 12v, per typical application (front page) confguration. symbol parameter conditions min typ max units f high highest frequency v pllfltr = 2.4v 340 400 440 khz r pllin pllin input resistance 50 k i pllfltr phase detector output current f pllin < f osc f pllin > f osc C15 15 a a control section v fb feedback reference voltage v comp = 1.2v(C40c to 85c) v comp = 1.2v (C55c to 125c) l l 0.792 0.785 0.8 0.8 0.808 0.815 v v v run run pin on/off threshold 1 1.6 2.2 v i ss soft-start charging current v run = 2.2v 1 1.7 a v stbymd(start) start-up threshold v stbymd rising 0.4 0.7 v v stbymd(ka) keep-active power on threshold v stbymd rising, v run = 0v 1.25 v v fcb forced continuous threshold 0.76 0.8 0.84 v i fcb forced continuous pin current v fcb = 0.85v C0.3 C0.2 C0.1 a v burst burst inhibit (constant frequency) threshold measured at fcb pin 5.3 5.5 v df (boost, max) maximum duty factor % switch m4 on 99 % df (buck, max) maximum duty factor % switch m1 on 99 % t on(min, buck) minimum on-time for synchronous switch in buck operation switch m1 (note 6) 200 250 ns rfbhi resistor between v out and v fb pins 99.5 100 100.5 k internal v cc regulator intv cc internal v cc voltage v in > 7v, v extvcc = 5v l 5.7 6 6.3 v v ldo /v ldo internal v cc load regulation i cc = 0ma to 20ma, v extvcc = 5v 0.3 2 % v extvcc extv cc switchover voltage i cc = 20ma, v extvcc rising l 5.4 5.6 v v extvcc(hys) extv cc switchover hysteresis 300 mv v extvcc extv cc switch drop voltage i cc = 20ma, v extvcc = 6v 60 150 mv current sensing section v sense(max) maximum current sense threshold boost mode buck mode l l C95 160 C130 190 C150 mv mv v sense(min, buck) minimum current sense threshold discontinuous mode C6 mv i sense sense pins total source current v sense C = v sense + = 0v C380 a pgood v fbh pgood upper threshold v fb rising 5.5 7.5 10 % v fbl pgood lower threshold v fb falling C5.5 C7.5 C10 % v fb(hys) pgood hysteresis v fb returning 2.5 % v pgl pgood low voltage i pgood = 2ma 0.2 0.3 v i pgood pgood leakage current v pgood = 5v 1 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm4609 is tested under pulsed load conditions such that t j t a . the ltm4609e is guaranteed to meet performance specifcations from 0c to 85c. specifcations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm4609i is guaranteed over the C40c to 85c operating temperature range. the ltm4609mp is guaranteed and tested over the C55c to 125c operating temperature range. for output current derating at high temperature, please refer to thermal considerations and output current derating discussion. high junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125c. note 3: see application note 100. note 4: the ltm4609 is tested in a feedback loop that servos v comp to a specifed voltage and measures the resultant v fb . note 5: turn-on and turn-off time are measured using 10% and 90% levels. transition delay time is measured using 50% levels. note 6: 100% test at wafer level only. note 7: absolute maximum rating of C5v on sw1 and sw2 is under transient condition only.
ltm4609 5 4609fc t ypical p er f or m ance c haracteristics effciency vs load current 6v in to 12v out effciency vs load current 12v in to 12v out effciency vs load current 32v in to 12v out effciency vs load current 3.3h inductor transient response from 6v in to 12v out transient response from 12v in to 12v out (refer to figure 18) effciency vs load current 5.6h inductor effciency vs load current 8h inductor effciency vs load current 3.3h inductor load current (a) 0.01 efficiency (%) 100 90 80 70 60 50 40 30 20 10 0 0.1 1 10 4609 g01 burst dcm ccm load current (a) 0.01 efficiency (%) 100 90 80 70 60 50 40 30 20 10 0 0.1 1 10 4609 g02 burst dcm ccm load current (a) 0.01 efficiency (%) 0.1 1 100 10 4609 g03 0 20 30 40 50 60 70 80 90 100 10 skip cycle dcm ccm 0 85 321 4 5 6 7 8 4609 g04 9 10 efficiency (%) load current (a) 70 75 80 90 100 95 12v in to 5v out 24v in to 5v out 32v in to 5v out load current (a) 0 90 efficiency (%) 91 93 94 95 100 97 21 3 4 5 4609 g05 92 98 99 96 6 7 8 28v in to 20v out 32v in to 20v out 36v in to 20v out load current (a) 0 93 efficiency (%) 94 95 100 97 1 2 3 4609 g06 98 99 96 54 6 30v in to 30v out 32v in to 30v out 36v in to 30v out load current (a) 0 70 efficiency (%) 75 85 90 95 100 0.5 1 1.5 4609 g07 80 2.52 3 5v in to 16v out 5v in to 24v out 5v in to 30v out load step: 0a to 3a at ccm output caps: 4x 22f ceramic caps and 2x 180f electrolytic caps 2x 15m sensing resistors 200s/div 4609 g08 i out 2a/div v out 200mv/div load step: 0a to 3a at ccm output caps: 4x 22f ceramic caps and 2x 180f electrolytic caps 2x 15m sensing resistors 200s/div 4609 g09 i out 2a/div v out 200mv/div
ltm4609 6 4609fc t ypical p er f or m ance c haracteristics start-up with 6v in to 12v out at i out = 4a start-up with 32v in to 12v out at i out = 5a short circuit with 6v in to 12v out at i out = 4a short circuit with 32v in to 12v out at i out = 5a transient response from 32v in to 12v out short circuit with 12v in to 34v out at i out = 2a load step: 0a to 5a at ccm output caps: 4x 22f ceramic caps and 2x 180 f electrolytic caps 2x 12m sensing resistors 200s/div v out 100mv/div i out 2a/div 4609 g10 0.1f soft-start cap output caps: 4x 22f ceramic caps and 2x 180 f electrolytic caps 2x 12m sensing resistors 50ms/div v out 10v/div i in 5a/div i l 5a/div 4609 g11 0.1f soft-start cap output caps: 4x 22f ceramic caps and 2x 180f electrolytic caps 2x 12m sensing resistors 10ms/div v out 10v/div i in 2a/div i l 5a/div 4609 g12 output caps: 4x 22f ceramic caps and 2x 180f electrolytic caps 2x 12m sensing resistors 50s/div 4609 g13 i in 5a/div v out 5v/div output caps: 4x 22f ceramic caps and 2x 180 f electrolytic caps 2x 12m sensing resistors 50s/div 4609 g14 v out 5v/div i in 2a/div output caps: 2x 10f 50v ceramic caps and 2x 47 f 50v electrolytic caps 2x 15m sensing resistors 20s/div 4607 g15 i in 5a/div v out 10v/div
ltm4609 7 4609fc p in functions v in (bank 1): power input pins. apply input voltage be- tween these pins and pgnd pins. recommend placing input decoupling capacitance directly between v in pins and pgnd pins. v out (bank 5): power output pins. apply output load between these pins and pgnd pins. recommend placing output decoupling capacitance directly between these pins and pgnd pins. pgnd (bank 6): power ground pins for both input and output returns. sw1, sw2 (bank 4, bank 2): switch nodes. the power inductor is connected between sw1 and sw2. r sense (bank 3): sensing resistor pin. the sensing resis- tor is connected from this pin to pgnd. sense + (pin a4): positive input to the current sense and reverse current detect comparators. sense C (pin a5): negative input to the current sense and reverse current detect comparators. extv cc (pin f6): external v cc input. when extv cc exceeds 5.7v, an internal switch connects this pin to intv cc and shuts down the internal regulator so that the controller and gate drive power is drawn from extv cc . do not exceed 7v at this pin and ensure that extv cc < v in intv cc (pin f5): internal 6v regulator output. this pin is for additional decoupling of the 6v internal regulator. do not source more than 40ma from intv cc . pllin (pin b9): external clock synchronization input to the phase detector. this pin is internally terminated to sgnd with a 50k resistor. the phase-locked loop will force the rising bottom gate signal of the controller to be synchronized with the rising edge of pllin signal. pllfltr (pin b8): the lowpass flter of the phase-locked loop is tied to this pin. this pin can also be used to set the frequency of the internal oscillator with an ac or dc volt- age. see the applications information section for details. ss (pin a6): soft-start pin. soft-start reduces the input surge current from the power source by gradually increas - ing the controllers current limit. stbymd (pin a10): ldo control pin. determines whether the internal ldo remains active when the controller is shut down. see operations section for details. if the stbymd pin is pulled to ground, the ss pin is internally pulled to ground to disable start-up and thereby providing a single control pin for turning off the controller. an internal de - coupling capacitor is tied to this pin. v fb (pin b6): the negative input of the error amplifer. internally, this pin is connected to v out with a 100k preci- sion resistor. different output voltages can be programmed with an additional resistor between v fb and sgnd pins. see the applications information section. fcb (pin a9): forced continuous control input. the voltage applied to this pin sets the operating mode of the module. when the applied voltage is less than 0.8v, the forced continuous current mode is active in boost operation and the skip cycle mode is active in buck operation. when the pin is tied to intv cc , the constant frequency discontinuous current mode is active in buck or boost operation. see the applications information section. sgnd (pin a7): signal ground pin. this pin connects to pgnd at output capacitor point. comp (pin b7): current control threshold and error amplifer compensation point. the current comparator threshold increases with this control voltage. the voltage ranges from 0v to 2.4v. pgood (pin b5): output voltage power good indicator. open drain logic output that is pulled to ground when the output voltage is not within 7.5% of the regulation point. run (pin a8): run control pin. a voltage below 1.6v will turn off the module. there is a 100k resistor between the run pin and sgnd in the module. do not apply more than 6v to this pin. see the applications information section.
ltm4609 8 4609fc decoupling r equire m ents s i m pli f ie d b lock diagra m symbol parameter conditions min typ max units c in external input capacitor requirement (v in = 4.5v to 36v, v out = 12v) i out = 4a 10 f c out external output capacitor requirement (v in = 4.5v to 36v, v out = 12v) i out = 4a 200 300 f t a = 25c. use figure 1 confguration. extv cc intv cc pgood pllin run on/off stbymd m1 4609 bd sw2 4.5v to 36v sw1 l v in c in controller c1 100k 0.1f fcb sgnd to pgnd plane as shown in figure 15 1000pf ss ss 0.1f m2 comp m3 12v 4a v fb r sense v out c out co1 m4 100k r fb 7.15k r sense int comp pllfltr int filter int filter pgnd sense ? sense + figure 1. simplifed ltm4609 block diagram
ltm4609 9 4609fc o peration power module description the ltm4609 is a non-isolated buck-boost dc/dc power supply. it can deliver a wide range output voltage from 0.8v to 34v over a wide input range from 4.5v to 36v, by only adding the sensing resistor, inductor and some external input and output capacitors. it provides precisely regulated output voltage programmable via one external resistor. the typical application schematic is shown in figure 18. the ltm4609 has an integrated current mode buck-boost controller, ultralow r ds(on) fets with fast switching speed and integrated schottky diodes. with current mode control and internal feedback loop compensation, the ltm4609 module has suffcient stability margins and good transient performance under a wide range of operating conditions and with a wide range of output capacitors. the operating frequency of the ltm4609 can be adjusted from 200khz to 400khz by setting the voltage on the pllfltr pin. alternatively, its frequency can be synchronized by the input clock signal from the pllin pin. the typical switch- ing frequency is 400khz. the burst mode ? and skip-cycle mode operations can be enabled at light loads to improve effciency, while the forced continuous mode and discontinuous mode operations are used for constant frequency applications. foldback current limiting is activated in an overcurrent condition as v fb drops. internal overvoltage and undervoltage compara - tors pull the open-drain pgood output low if the output feedback voltage exits the 7.5% window around the regulation point. pulling the run pin below 1.6v forces the controller into its shutdown state. if an external bias supply is applied on the extv cc pin, then an effciency improvement will occur due to the reduced power loss in the internal linear regulator. this is especially true at the higher end of the input voltage range. a pplications i n f or m ation the typical ltm4609 application circuit is shown in fig - ure 18. external component selection is primarily deter - mined by the maximum load current and output voltage. refer to table 3 for specifc external capacitor requirements for a particular application. output voltage programming the pwm controller has an internal 0.8v reference voltage. as shown in the block diagram, a 100k internal feedback resistor connects v out and v fb pins together. adding a resistor r fb from the v fb pin to the sgnd pin programs the output voltage: v out = 0.8v ? 100k + r fb r fb table 1. r fb resistor (0.5%) vs output voltage v out 0.8v 1.5v 2.5v 3.3v 5v 6v 8v 9v r fb open 115k 47.5k 32.4k 19.1k 15.4k 11k 9.76k v out 10v 12v 15v 16v 20v 24v 30v 34v r fb 8.66k 7.15k 5.62k 5.23k 4.12k 3.4k 2.74k 2.37k operation frequency selection the ltm4609 uses current mode control architecture at constant switching frequency, which is determined by the internal oscillators capacitor. this internal capacitor is charged by a fxed current plus an additional current that is proportional to the voltage applied to the pllfltr pin. the pllfltr pin can be grounded to lower the frequency to 200khz or tied to 2.4v to yield approximately 400khz. when pllfltr is left open, the pllfltr pin goes low, forcing the oscillator to its minimum frequency. a graph for the voltage applied to the pllfltr pin vs frequency is given in figure 2. as the operating frequency increases, the gate charge losses will be higher, thus the effciency is lower. the maximum switching frequency is approximately 400khz. f re q uency s ynchroni z a tion the ltm4609 can also be synchronized to an external sour ce via the pllin pin instead of adjusting the voltage on the pllfltr pin directly. the power module has a
ltm4609 10 4609fc phase-locked loop comprised of an internal voltage con - trolled oscillator and a phase detector. this allows turning on the internal top mosfet for locking to the rising edge of the external clock. a pulse detection circuit is used to detect a clock on the pllin pin to turn on the phase-lock loop. the input pulse width of the clock has to be at least 400ns, and 2v in amplitude. the synchronized frequency ranges from 200khz to 400khz, corresponding to a dc volt- age input from 0v to 2.4v at pllfltr. during the start-up of the regulator, the phase-lock loop function is disabled. a pplications i n f or m ation figure 2. frequency vs pllfltr pin voltage low current operation to improve effciency at low output current operation, ltm4609 provides three modes for both buck and boost operations by accepting a logic input on the fcb pin. table 2 shows the different operation modes. table 2. different operating modes (v intvcc = 6v) fcb pin buck boost 0v to 0.75v force continuous mode force continuous mode 0.85v to v intvcc C 1v skip-cycle mode burst mode operation >5.3v dcm with constant freq dcm with constant freq when the fcb pin voltage is lower than 0.8v, the controller behaves as a continuous, pwm current mode synchronous switching regulator. when the fcb pin voltage is below v intvcc C 1v, but greater than 0.85v, where v intvcc is 6v, the controller enters burst mode operation in boost opera- tion or enters skip-cycle mode in buck operation. during boost operation, burst mode operation is activated if the load current is lower than the preset minimum output current level. the mosfets will turn on for several cycles, followed by a variable sleep interval depending upon the load current. during buck operation, skip-cycle mode sets a minimum positive inductor current level. in this mode, some cycles will be skipped when the output load current drops below 1% of the maximum designed load in order to maintain the output voltage. when the fcb pin voltage is tied to the intv cc pin, the controller enters constant frequency discontinuous current mode (dcm). for boost operation, if the output voltage is high enough, the controller can enter the continuous current buck mode for one cycle to discharge inductor current. in the following cycle, the controller will resume dcm boost operation. for buck operation, constant frequency discontinuous current mode is turned on if the preset minimum negative inductor current level is reached. at very light loads, this constant frequency operation is not as effcient as burst mode operation or skip-cycle, but does provide low noise, constant frequency operation. input capacitors in boost mode, since the input current is continuous, only minimum input capacitors are required. however, the input current is discontinuous in buck mode. so the selection of input capacitor c in is driven by the need of fltering the input square wave current. for a buck converter, the switching duty-cycle can be estimated as: d = v out v in without considering the inductor current ripple, the rms current of the input capacitor can be estimated as: i cin(rms) = i out(max) ? d ? (1 ? d) in the above equation, is the estimated effciency of the power module. c in can be a switcher-rated electrolytic aluminum capacitor, os-con capacitor or high volume ceramic capacitors. note the capacitor ripple current ratings are often based on temperature and hours of life. pllfltr pin voltage (v) 0 0.5 operating frequency (khz) 2.0 450 400 350 300 250 200 150 100 50 0 4609 f02 1.0 1.5 2.5
ltm4609 11 4609fc a pplications i n f or m ation this makes it advisable to properly derate the input capaci- tor, or choose a capacitor rated at a higher temperature than required. always contact the capacitor manufacturer for derating requirements. output capacitors in boost mode, the discontinuous current shifts from the input to the output, so the output capacitor c out must be capable of reducing the output voltage ripple. for boost and buck modes, the steady ripple due to charg - ing and discharging the bulk capacitance is given by: v ripple,boost = i out(max) ? v out ? v in(min) ( ) c out ? v out ? ? v ripple,buck = v out ? v in(max) ? v out ( ) 8 ? l ? c out ? v in(max) ? ? 2 the steady ripple due to the voltage drop across the esr (effective series resistance) is given by: v esr,buck = i l(max) ? esr v esr,boost = i l(max) ? esr the ltm4609 is designed for low output voltage ripple. the bulk output capacitors defned as c out are chosen with low enough esr to meet the output voltage ripple and transient requirements. c out can be the low esr tantalum capacitor, the low esr polymer capacitor or the ceramic capacitor. multiple capacitors can be placed in parallel to meet the esr and rms current handling requirements. the typical capacitance is 300f. additional output fltering may be required by the system designer, if further reduction of output ripple or dynamic transient spike is required. table 3 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot at a current transient. inductor selection the inductor is chiefy decided by the required ripple cur - rent and the operating frequency. the inductor current ripple i l is typically set to 20% to 40% of the maximum inductor current. in the inductor design, the worst cases in continuous mode are considered as follows: l boost v 2 in ? v out(max) ? v in ( ) v 2 out(max) ? ? ? i out(max) ? ripple% l buck v out ? v in(max) ? v out ( ) v in(max) ? ? ? i out(max) ? ripple% where: ? is operating frequency, hz ripple% is allowable inductor current ripple, % v out(max) is maximum output voltage, v v in(max) is maximum input voltage, v v out is output voltage, v i out(max) is maximum output load current, a the inductor should have low dc resistance to reduce the i 2 r losses, and must be able to handle the peak inductor current without saturation. to minimize radiated noise, use a toroid, pot core or shielded bobbin inductor. please refer to table 3 for the recommended inductors for dif - ferent cases. r sense selection and maximum output current r sense is chosen based on the required inductor current. since the maximum inductor valley current at buck mode is much lower than the inductor peak current at boost mode, different sensing resistors are suggested to use in buck and boost modes. the current comparator threshold sets the peak of the inductor current in boost mode and the maximum inductor valley current in buck mode. in boost mode, the allowed maximum average load current is: i out(max,boost) = 160mv r sense ? i l 2 ? ? ? ? ? ? ? v in v out where i l is peak-to-peak inductor ripple current.
ltm4609 12 4609fc a pplications i n f or m ation in buck mode, the allowed maximum average load cur - rent is: i out(max,buck) = 130mv r sense + i l 2 the maximum current sensing r sense value for the boost mode is: r sense(max,boost) = 2 ? 160mv ? v in 2 ? i out(max,boost) ? v out + i l ? v in the maximum current sensing r sense value for the buck mode is: r sense(max,buck) = 2 ? 130mv 2 ? i out(max,buck) ? i l a 20% to 30% margin on the calculated sensing resistor is usually recommended. please refer to table 3 for the recommended sensing resistors for different applications. soft-start the ss pin provides a means to soft-start the regulator. a capacitor on this pin will program the ramp rate of the output voltage. a 1.7a current source will charge up the external soft-start capacitor. this will control the ramp of the internal reference and the output voltage. the total soft-start time can be calculated as: t softstart = 2.4v ? c ss 1.7a when the run pin falls below 1.6v, then soft-start pin is reset to allow for proper soft-start control when the regulator is enabled again. current foldback and force continuous mode are disabled during the soft-start pro- cess. the soft-start function can also be used to control the output ramp up time, so that another regulator can be easily tracked. do not apply more than 6v to the ss pin. run enable the run pin is used to enable the power module. the pin can be driven with a logic input, not to exceed 6v. the run pin can also be used as an undervoltage lockout (uvlo) function by connecting a resistor from the input supply to the run pin. the equation: v _uvlo = r1 + r2 r2 ? 1.6v power good the pgood pin is an open drain pin that can be used to monitor valid output voltage regulation. this pin monitors a 7.5% window around the regulation point. comp pin this pin is the external compensation pin. the module has already been internally compensated for most output voltages. a spice model is available for other control loop optimization. fault conditions: current limit and overcurrent foldback ltm4609 has a current mode controller, which inherently limits the cycle-by-cycle inductor current not only in steady state operation, but also in transient. refer to table 3. to further limit current in the event of an overload condi - tion, the ltm4609 provides foldback current limiting. if the output voltage falls by more than 70%, then the maximum output current is progressively lowered to about 30% of its full current limit value for boost mode and about 40% for buck mode. standby mode (stbymd) the standby mode (stbymd) pin provides several choices for start-up and standby operational modes. if the pin is pulled to ground, the ss pin is internally pulled to ground, preventing start-up and thereby providing a single control
ltm4609 13 4609fc a pplications i n f or m ation pin for turning off the controller. if the pin is left open or decoupled with a capacitor to ground, the ss pin is internally provided with a starting current, permitting external control for turning on the controller. if the pin is connected to a voltage greater than 1.25v, the internal regulator (intv cc ) will be on even when the controller is shut down (run pin voltage <1.6v). in this mode, the onboard 6v output linear regulator can provide power to keep-alive functions such as a keyboard controller. intv cc and extv cc an internal p-channel low dropout regulator produces 6v at the intv cc pin from the v in supply pin. intv cc powers the control chip and internal circuitry within the module. the ltm4609 also provides the external supply voltage pin extv cc . when the voltage applied to extv cc rises above 5.7v, the internal regulator is turned off and an internal switch connects the extv cc pin to the intv cc pin thereby supplying internal power. the switch remains closed as long as the voltage applied to extv cc remains above 5.5v. this allows the mosfet driver and control power to be derived from the output when (5.7v < v out < 7v) and from the internal regulator when the output is out of regulation (start- up, short-circuit). if more current is required through the extv cc switch than is specifed, an external schottky diode can be interposed between the extv cc and intv cc pins. ensure that extv cc v in . the following list summarizes the three possible connec- tions for extv cc : 1. ext v cc left open (or grounded). this will cause intv cc to be powered from the internal 6v regulator at the cost of a small effciency penalty. 2. ext v cc connected directly to v out (5.7v < v out < 7v). this is the normal connection for a 6v regulator and provides the highest effciency. 3. ext v cc connected to an external supply. if an external supply is available in the 5.5v to 7v range, it may be used to power extv cc provided it is compatible with the mosfet gate drive requirements. thermal considerations and output current derating in different applications, ltm4609 operates in a variety of thermal environments. the maximum output current is limited by the environmental thermal condition. suffcient cooling should be provided to ensure reliable operation. when the cooling is limited, proper output current de- rating is necessary, considering ambient temperature, airfow, input/output condition, and the need for increased reliability. the power loss curves in figures 5 and 6 can be used in coordination with the load current derating curves in figures 7 to 14 for calculating an approximate ja for the module. column designation delineates between no heat sink, and a bga heat sink. each of the load current derating curves will lower the maximum load current as a function of the increased ambient temperature to keep the maximum junction temperature of the power module at 115c allowing a safe margin for the maximum operat- ing temperature below 125c. each of the derating curves and the power loss curve that corresponds to the correct output voltage can be used to solve for the approximate ja of the condition. a complete explanation of the thermal characteristics is provided in the thermal application note for the ltm4609. d esign e xamples buck mode operation as a design example, use input voltage v in = 12v to 36v, v out = 12v and ? = 400khz. set the pllfltr pin at 2.4v or more for 400khz frequency and connect fcb to ground for continuous current mode operation. if a divider is used to set the frequency as shown in figure 16, the bottom resistor r3 is recommended not to exceed 1k. to set the output voltage at 12v, the resistor r fb from v fb pin to ground should be chosen as: r fb = 0.8v ? 100k v out ? 0.8v 7.15k
ltm4609 14 4609fc a pplications i n f or m ation to choose a proper inductor, we need to know the current ripple at different input voltages. the inductor should be chosen by considering the worst case in the practi- cal operating region. if the maximum output power p is 120w at buck mode, we can get the current ripple ratio of the current ripple i l to the maximum inductor current i l as follows: i l i l = (v in ? v out ) ? v out 2 v in ? l ? ? ? p figure 3 shows the current ripple ratio at different input voltages based on the inductor values: 2.5h, 3.3h, 4.7h and 6h. if we need about 40% ripple current ratio at all inputs, the 4.7h inductor can be selected. at buck mode, sensing resistor selection is based on the maximum output current and the allowed maximum sensing threshold 130mv. r sense = 2 ? 130mv 2 ? (p / v out ) ? i l consider the safety margin about 30%, we can choose the sensing resistor as 9m. for the input capacitor, use a low esr sized capacitor to handle the maximum rms current. input capacitors are required to be placed adjacent to the module. in figure 16, the 10f ceramic input capacitors are selected for their ability to handle the large rms current into the converter. the 100f bulk capacitor is only needed if the input source impedance is compromised by long inductive leads or traces. for the output capacitor, the output voltage ripple and transient requirements require low esr capacitors. if assuming that the esr dominates the output ripple, the output ripple is as follows: v out(p-p) = esr ? i l if a total low esr of about 5m is chosen for output capacitors, the maximum output ripple of 21.5mv occurs at the input voltage of 36v with the current ripple at 4.3a. boost mode operation for boost mode operation, use input voltage v in = 5v to 12v, v out = 12v and ? = 400khz. set the pllfltr pin and r fb as in buck mode. if the maximum output power p is 50w at boost mode and the module effciency is about 90%, we can get the current ripple ratio of the current ripple i l to the maximum inductor current i l as follows: i l i l = (v out ? v in ) ? v in 2 v out ? l ? ? ? p figure 3. current ripple ratio at different inputs for buck mode input voltage v in (v) 12 18 current ripple ratio 0.8 0.6 2.5h 3.3h 6h 0.4 0.2 0 4609 f03 24 30 36 4.7h v out = 12v ? = 400khz
ltm4609 15 4609fc a pplications i n f or m ation figure 4 shows the current ripple ratio at different input voltages based on the inductor values: 1.5h, 2.5h, 3.3h and 4.7h. if we need 30% ripple current ratio at all inputs, the 3.3h inductor can be selected. at boost mode, sensing resistor selection is based on the maximum input current and the allowed maximum sensing threshold 160mv. r sense = 2 ? 160mv 2 ? p ? v in(min) + i l consider the safety margin about 30%, we can choose the sensing resistor as 8m. for the input capacitor, only minimum capacitors are needed to handle the maximum rms current, since it is a continuous input current at boost mode. a 100f capacitor is only needed if the input source impedance is compromised by long inductive leads or traces. since the output capacitors at boost mode need to flter the square wave current, more capacitors are expected to achieve the same output ripples as the buck mode. if assuming that the esr dominates the output ripple, the output ripple is as follows: v out(p-p) = esr ? i l(max) if a total low esr about 5m is chosen for output capaci - tors, the maximum output ripple of 70mv occurs at the input voltage of 5v with the peak inductor current at 14a. an rc snubber is recommended on sw1 to obtain low switching noise, as shown in figure 17. wide input mode operation if a wide input range is required from 5v to 36v, the module will work in different operation modes. if input voltage v in = 5v to 36v, v out = 12v and ? = 400khz, the design needs to consider the worst case in buck or boost mode design. therefore, the maximum output power is limited to 60w. the sensing resistor is chosen at 8m, the input capacitor is the same as the buck mode design and the output capacitor uses the boost mode design. since the maximum output ripple normally occurs at boost mode in the wide input mode design, more inductor ripple cur - rent, up to 150% of the inductor current, is allowed at buck mode to meet the ripple design requirement. thus, a 3.3h inductor is chosen at the wide input mode. the maximum output ripple voltage is still 70mv if the total esr is about 5m. additionally, the current limit may become very high when the module runs at buck mode due to the low sensing resistor used in the wide input mode operation. safety considerations the ltm4609 modules do not provide isolation from v in to v out . there is no internal fuse. if required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. figure 4. current ripple ratio at different inputs for boost mode input voltage v in (v) 5 7 current ripple ratio 0.8 0.6 0.4 0.2 0 4609 f04 9 11 12 6 8 10 1.5h 2.5h 3.3h 4.7h v out = 12v ? = 400khz
ltm4609 16 4609fc a pplications i n f or m ation table 3. typical components (? = 400khz) c out1 vendors part number c out2 vendors part number tdk c4532x7r1e226m (22f, 25v) sanyo 16svp180mx (180f, 16v), 20svp150mx (150f, 20v) inductor vendors part number r sense vendors part number toko fda1254 vishay power metal strip resistors wsl1206-18 sumida cdep134, cdep145, cdep147 panasonic thick film chip resistors erj12 v in (v) v out (v) r sense (0.5w rating) inductor (h) c in (ceramic) c in (bulk) c out1 (ceramic) c out2 (bulk) i out(max) * (a) 5 10 2 16mw 0.5w 2.2 none 150f 35v 4 22f 25v 2 180f 16v 4 15 10 2 18mw 0.5w 2.2 2 10f 25v 150f 35v 2 22f 25v 2 180f 16v 11 20 10 2 20mw 0.5w 3.3 2 10f 25v 150f 35v 2 22f 25v 2 180f 16v 10 24 10 2 18m 0.5w 3.3 2 10f 25v 150f 35v 2 22f 25v 2 180f 16v 10 32 10 2 22m 0.5w 4.7 2 10f 50v 150f 35v 2 22f 25v 2 180f 16v 9 36 10 2 22m 0.5w 4.7 2 10f 50v 150f 50v 2 22f 25v 2 180f 16v 9 6 12 2 14m 0.5w 2.2 none 150f 35v 4 22f 25v 2 180f 16v 4 16 12 2 16mw 0.5w 2.2 2 10f 25v 150f 35v 2 22f 25v 2 180f 16v 11 20 12 2 18mw 0.5w 3.3 2 10f 25v 150f 35v 2 22f 25v 2 180f 16v 10 24 12 2 18m 0.5w 3.3 2 10f 25v 150f 35v 2 22f 25v 2 180f 16v 9 32 12 2 22m 0.5w 4.7 2 10f 50v 150f 35v 2 22f 25v 2 180f 16v 9 36 12 2 22m 0.5w 4.7 2 10f 50v 150f 50v 2 22f 25v 2 180f 16v 9 5 16 2 18mw 0.5w 3.3 none 150f 35v 4 22f 25v 2 150f 20v 2.5 8 16 2 16mw 0.5w 3.3 none 150f 35v 4 22f 25v 2 150f 20v 4 12 16 2 14mw 0.5w 2.2 none 150f 35v 4 22f 25v 2 150f 20v 8 20 16 2 20mw 0.5w 2.2 2 10f 25v 150f 35v 2 22f 25v 2 150f 20v 10 24 16 2 20m 0.5w 3.3 2 10f 25v 150f 35v 2 22f 25v 2 150f 20v 10 32 16 2 22m 0.5w 4.7 2 10f 50v 150f 35v 2 22f 25v 2 150f 20v 9 36 16 2 22m 0.5w 6 2 10f 50v 150f 50v 2 22f 25v 2 150f 20v 9 5 20 2 18m 0.5w 3.3 none 150f 50v 4 22f 25v 2 150f 50v 2 10 20 2 18m 0.5w 3.3 none 150f 50v 4 22f 25v 2 150f 50v 5 32 20 1 12m 0.5w 6 2 10f 50v 150f 50v 2 22f 25v 2 150f 50v 9 36 20 1 13m 0.5w 8 2 10f 50v 150f 50v 2 22f 25v 2 150f 50v 8 5 24 2 16m 0.5w 3.3 none 150f 50v 4 22f 25v 2 150f 50v 1.5 12 24 2 18m 0.5w 4.7 none 150f 50v 4 22f 25v 2 150f 50v 5 32 24 1 14m 0.5w 4.7 2 10f 50v 150f 50v 2 22f 25v 2 150f 50v 8 36 24 1 13m 0.5w 7 2 10f 50v 150f 50v 2 22f 25v 2 150f 50v 8
ltm4609 17 4609fc figure 5. boost mode operation figure 6. buck mode operation a pplications i n f or m ation v in (v) v out (v) r sense (0.5w rating) inductor (h) c in (ceramic) c in (bulk) c out1 (ceramic) c out2 (bulk) i out(max) * (a) 5 30 2 16m? 0.5w 3.3 none 150f 50v 4 22f 50v 2 150f 50v 1.3 12 30 2 14m? 0.5w 4.7 none 150f 50v 4 22f 50v 2 150f 50v 3 32 30 1 12m? 0.5w 2.5 2 10f 50v 150f 50v 2 22f 50v 2 150f 50v 8 36 30 1 13m? 0.5w 4.7 2 10f 50v 150f 50v 2 22f 50v 2 150f 50v 8 5 34 2 18m? 0.5w 3.3 none 150f 50v 4 22f 50v 2 150f 50v 1 12 34 2 16m? 0.5w 4.7 none 150f 50v 4 22f 50v 2 150f 50v 3 24 34 1 12m? 0.5w 5.6 none 150f 50v 4 22f 50v 2 150f 50v 5 36 34 1 12m? 0.5w 2.5 2 10f 50v 150f 50v 2 22f 50v 2 150f 50v 8 inductor manufacturer website phone number sumida www.sumida.com 408-321-9660 toko www.toko.com 847-297-0070 sensing resistor manufacturer website phone number panasonic www.panasonic.com/industrial/components 949-462-1816 koa www.koaspeer.com 814-362-5536 vishay www.vishay.com 800-433-5700 *maximum load current is based on the linear technology dc1198a at room temperature with natural convection. poor board layout design may decrease the maximum load current. load current (a) 0 0 power loss (w) 1 3 4 5 7 6 1 4609 f05 2 2 3 5v in to 16v out 5v in to 30v out load current (a) 0 0 power loss (w) 1 3 4 5 7 6 1 2 3 4 5 6 4609 f06 2 7 8 9 32v in to 12v out 36v in to 20v out table 3. typical components (? = 400khz) continued (power loss includes all external components) t ypical a pplications
ltm4609 18 4609fc t ypical a pplications figure 9. 5v in to 30v out without heat sink figure 10. 5v in to 30v out with heat sink figure 11. 32v in to 12v out without heat sink figure 12. 32v in to 12v out with heat sink figure 7. 5v in to 16v out without heat sink figure 8. 5v in to 16v out with heat sink ambient temperature (c) 25 0 maximum load current (a) 0.5 1.5 2.0 2.5 3.0 35 45 55 65 75 85 4609 f07 1.0 95 105 115 5v in to 16v out with 0lfm 5v in to 16v out with 200lfm 5v in to 16v out with 400lfm ambient temperature (c) 25 0 maximum load current (a) 0.5 1.5 2.0 2.5 3.0 45 65 85 4609 f08 1.0 105 125 5v in to 16v out with 0lfm 5v in to 16v out with 200lfm 5v in to 16v out with 400lfm ambient temperature (c) 0 maximum load current (a) 0.25 0.75 1.00 1.25 1.50 25 4535 55 7565 4609 f09 0.50 85 95 105 5v in to 30v out with 0lfm 5v in to 30v out with 200lfm 5v in to 30v out with 400lfm ambient temperature (c) 0 maximum load current (a) 0.25 0.75 1.00 1.25 1.50 25 4535 55 7565 4609 f10 0.50 85 95 105 5v in to 30v out with 0lfm 5v in to 30v out with 200lfm 5v in to 30v out with 400lfm ambient temperature (c) 25 35 45 55 65 75 85 maximum load current (a) 95 4609 f12 32v in to 12v out with 0lfm 32v in to 12v out with 200lfm 32v in to 12v out with 400lfm 10 8 9 4 2 1 3 5 7 6 0 ambient temperature (c) 25 35 45 55 65 75 85 maximum load current (a) 95 4609 f11 32v in to 12v out with 0lfm 32v in to 12v out with 200lfm 32v in to 12v out with 400lfm 10 8 7 9 4 3 2 1 6 5 0
ltm4609 19 4609fc table 4. boost mode derating curve v out (v) power loss curve air flow (lfm) heat sink ja (c/w)* figure 7, 9 16, 30 figure 5 0 none 11.4 figure 7, 9 16, 30 figure 5 200 none 8.5 figure 7, 9 16, 30 figure 5 400 none 7.5 figure 8, 10 16, 30 figure 5 0 bga heat sink 11.0 figure 8, 10 16, 30 figure 5 200 bga heat sink 7.9 figure 8, 10 16, 30 figure 5 400 bga heat sink 7.1 table 5. buck mode derating curve v out (v) power loss curve air flow (lfm) heat sink ja (c/w)* figure 11, 13 12, 20 figure 6 0 none 8.2 figure 11, 13 12, 20 figure 6 200 none 5.9 figure 11, 13 12, 20 figure 6 400 none 5.4 figure 12, 14 12, 20 figure 6 0 bga heat sink 7.5 figure 12, 14 12, 20 figure 6 200 bga heat sink 5.3 figure 12, 14 12, 20 figure 6 400 bga heat sink 4.8 heat sink manufacturer part number website aavid thermalloy 375424b00034g www.aavidthermalloy.com cool innovations 4-050503p to 4-050508p www.coolinnovations.com *the results of thermal resistance from junction to ambient ja are based on the demo board dc 1198a. thus, the maximum temperature on board is treated as the junction temperature (which is in the module regulator for most cases) and the power losses from all components are counted for calculations. it has to be mentioned that poor board design may increase the ja . figure 13. 36v in to 20v out without heat sink figure 14. 36v in to 20v out with heat sink t ypical a pplications ambient temperature (c) 0 maximum load current (a) 1 5 6 7 8 25 554535 65 4609 f13 2 4 3 8575 95 105 36v in to 20v out with 0lfm 36v in to 20v out with 200lfm 36v in to 20v out with 400lfm ambient temperature (c) 0 maximum load current (a) 1 5 6 7 8 25 554535 65 4609 f14 2 4 3 8575 95 105 36v in to 20v out with 0lfm 36v in to 20v out with 200lfm 36v in to 20v out with 400lfm applications in f or m ation
ltm4609 20 4609fc v out c out v in r sense r sense pgnd sw1 l1 sw2 pgnd sgnd c in 4609 f15 kelvin connections to r sense + ? a pplications i n f or m ation layout checklist/example the high integration of ltm4609 makes the pcb board layout very simple and easy. however, to optimize its electri - cal and thermal performance, some layout considerations are still necessary. ? use large pcb copper areas for high current path, includ- ing v in , r sense , sw1, sw2, pgnd and v out . it helps to minimize the pcb conduction loss and thermal stress. ? place high frequency input and output ceramic capaci- tors next to the v in , pgnd and v out pins to minimize high frequency noise ? route se nse C and sense + leads together with minimum pc trace spacing. avoid sense lines passing through noisy areas, such as switch nodes. ? place a dedicated power ground layer underneath the unit. ? t o minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between the top layer and other power layers ? do not put vias directly on pads, unless the vias are capped. ? use a separated sgnd ground copper area for com- ponents connected to signal pins. connect the sgnd to pgnd underneath the unit. figure 15. gives a good example of the recommended layout. figure 15. recommended pcb layout (lga shown, for bga use circle pads)
ltm4609 21 4609fc v out pgood fcb run sw1 comp sw2 intv cc r sense extv cc sense ? stbymd pllfltr ss v fb sgnd pllin ltm4609 r2 9m l1 4.7h r fb 7.15k r1 1.5k r3 1k 100f 25v 4609 ta02 v out 12v 10a clock sync v in pgnd v in 12v to 36v c3 0.1f 10f 50v 2 + on/off sense + figure 16. buck mode operation with 12v to 36v input t ypical a pplications v out pgood fcb run sw1 sw2 extv cc stbymd ss v fb sgnd pllin ltm4609 l1 3.3h r fb 7.15k 22f 25v 2 330f 25v 4609 ta03 v out 12v 4a clock sync v in pgnd v in 5v to 12v c3 0.1f 4.7f 35v + on/off comp intv cc r sense sense ? pllfltr r2 8m sense + 2 2200pf optional for low switching noise r1 1.5k r3 1k figure 17. boost mode operation with 5v to 12v input with low switching noise (optional)
ltm4609 22 4609fc t ypical a pplications v out pgood fcb run sw1 sw2 extv cc stbymd ss v fb sgnd pllin ltm4609 r fb 7.15k 22f 25v 4 330f 25v 4609 ta04 v out 12v 4a clock sync v in pgnd v in 5v to 36v c3 0.1f 10f 50v 2 + on/off comp intv cc r sense sense ? pllfltr r2 8m sense + l1 3.3h 2 2200pf r1 1.5k r3 1k figure 18. wide input mode with 5v to 36v input, 12v at 4a output v out pgood fcb run sw1 sw2 extv cc stbymd ss v fb sgnd pllin ltm4609 l1 4.7h r fb 2.55k 220f 50v 4609 ta05 v out 32v 2a clock sync v in pgnd v in 8v to 36v c3 0.1f 10f 50v 2 + on/off comp intv cc r sense sense ? pllfltr r2 9m sense + r1 1.5k r3 1k figure 19. 32v at 2a design
ltm4609 23 4609fc t ypical a pplications figure 20. two-phase parallel, 12v at 8a design v out pgood fcb run sw1 comp sw2 intv cc extv cc stbymd ss v fb sgnd pllin ltm4609 l2 3.3h c4 22f 25v 2 330f 25v 4609 ta06 clock sync 180 phase clock sync 0 phase v in pgnd 10f 50v + v out pgood fcb run sw1 comp sw2 intv cc extv cc pllfltr pllfltr out1 v + out2 mod gnd set ltc6908-1 stbymd ss v fb sgnd pllin ltm4609 l1 3.3h r fb * 3.57k r4 324k c2 22f 25v 2 330f 25v v out 12v 8a 2-phase oscillator v in pgnd v in 5v to 36v c3 0.1f 10f 50v + r5 100k c1 0.1f 5.1v zener r sense sense ? r3 8m sense + r sense sense ? r2 8m sense + 5.1v 200 *r fb is selected using where n is the number of paralleled modules. v out = 0.8v 100k n + r fb r fb
ltm4609 24 4609fc p ackage description lga package 141-lead (15mm 15mm 2.82mm) (reference ltc dwg # 05-08-1840 rev a) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 5. primary datum -z- is seating plane 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature package top view 4 pin ?a1? corner x y aaa z aaa z package bottom view 3 see notes suggested pcb layout top view lga 141 1111 rev a ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? 0.0000 0.0000 d e b e e b f g 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 6.9850 detail b package side view bbb z symbol a b d e e f g h1 h2 aaa bbb eee min 2.72 0.60 0.27 2.45 nom 2.82 0.63 15.00 15.00 1.27 13.97 13.97 0.32 2.50 max 2.92 0.66 0.37 2.55 0.15 0.10 0.05 notes dimensions total number of lga pads: 141 detail b substrate mold cap z h2 h1 a detail a 0.630 0.025 sq. 143x s yxeee detail a c(0.22 x 45) pad 1 f g h m l j k e a b c d 2 1 4 3 567 12 891011
ltm4609 25 4609fc p ackage description bga package 141-lead (15mm 15mm 3.42mm) (reference ltc dwg # 05-08-1899 rev ?) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 5. primary datum -z- is seating plane 6. solder ball composition is 96.5% sn/3.0% ag/0.5% cu 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature package top view 4 pin ?a1? corner x y aaa z aaa z package bottom view pin 1 3 see notes suggested pcb layout top view bga 141 1011 rev a ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? detail a 0.0000 0.0000 detail a ?b (141 places) detail b substrate 0.27 ? 0.37 2.45 ? 2.55 // bbb z d a a1 b1 ccc z detail b package side view mold cap z m x yzddd m zeee 0.630 0.025 ? 141x symbol a a1 a2 b b1 d e e f g aaa bbb ccc ddd eee min 3.22 0.50 2.72 0.60 0.60 nom 3.42 0.60 2.82 0.75 0.63 15.0 15.0 1.27 13.97 13.97 max 3.62 0.70 2.92 0.90 0.66 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 141 e b e e b a2 f g bga package 141-lead (15mm 15mm 3.42mm) (reference ltc dwg # 05-08-1899 rev a) 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 6.9850 f g h m l j k e a b c d 2 1 4 3 567 12 891011
ltm4609 26 4609fc p ackage description pin assignment table 6 (arranged by pin number) pin name function pin name function pin name function pin name function pin name function pin name function a1 pgnd c1 pgnd e1 v out g1 v out j1 sw1 l1 sw1 a2 pgnd c2 pgnd e2 v out g2 v out j2 sw1 l2 sw1 a3 pgnd c3 pgnd e3 pgnd g3 v out j3 sw1 l3 sw1 a4 sense + c4 pgnd e4 pgnd g4 v out j4 sw1 l4 sw1 a5 sense C c5 pgnd e5 pgnd g5 r sense j5 r sense l5 r sense a6 ss c6 pgnd e6 pgnd g6 r sense j6 r sense l6 r sense a7 sgnd c7 pgnd e7 pgnd g7 r sense j7 r sense l7 sw2 a8 run c8 pgnd e8 pgnd g8 r sense j8 sw2 l8 sw2 a9 fcb c9 pgnd e9 pgnd g9 r sense j9 sw2 l9 sw2 a10 stbymd c10 pgnd e10 pgnd g10 r sense j10 v in l10 v in a11 pgnd c11 pgnd e11 pgnd g11 r sense j11 v in l11 v in a12 pgnd c12 pgnd e12 pgnd g12 r sense j12 v in l12 v in b1 pgnd d1 pgnd f1 v out h1 v out k1 sw1 m1 sw1 b2 pgnd d2 pgnd f2 v out h2 v out k2 sw1 m2 sw1 b3 pgnd d3 pgnd f3 v out h3 v out k3 sw1 m3 sw1 b4 pgnd d4 pgnd f4 v out h4 v out k4 sw1 m4 sw1 b5 pgood d5 pgnd f5 intv cc h5 r sense k5 r sense m5 r sense b6 v fb d6 pgnd f6 extv cc h6 r sense k6 r sense m6 r sense b7 comp d7 pgnd f7 C h7 r sense k7 sw2 m7 sw2 b8 pllfltr d8 pgnd f8 C h8 r sense k8 sw2 m8 sw2 b9 pllin d9 pgnd f9 C h9 r sense k9 sw2 m9 sw2 b10 pgnd d10 pgnd f10 r sense h10 r sense k10 v in m10 v in b11 pgnd d11 pgnd f11 r sense h11 r sense k11 v in m11 v in b12 pgnd d12 pgnd f12 r sense h12 r sense k12 v in m12 v in
ltm4609 27 4609fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h istory rev date description page number b 10/10 mp-grade part added. refected throughout the data sheet. 1-26 c 03/12 added the bga package option and updated the typical application. updated the pin confguration and order information sections. updated note 2. added intv cc maximum load current. updated the recommended heat sinks table. added bga package drawing. updated the related parts table. 1 2 4 7 19 25 28 (revision history begins at rev b)
ltm4609 28 4609fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax : (408) 434-0507 l www.linear.com linear technology corporation 2009 lt 0312 rev c ? printed in usa part number description comments ltc3780 36v buck-boost controller synchronous operation; single inductor, 4v v in 36v, 0.8v v out 30v ltc3785 10v buck-boost controller synchronous, no r sense ?, 2.7v v in 10v, 2.7v v out 10v ltm4601/ltm4601a 12a dc/dc module regulator with pll, output tracking/ margining and remote sensing synchronizable, polyphase ? operation to 48a, ltm4601-1 has no remote sensing ltm4603 6a dc/dc module with pll and output tracking/margining and remote sensing synchronizable, polyphase operation, ltm4603-1 version has no remote sensing, pin compatible with the ltm4601 ltm4604a 4a, low v in , dc/dc module regulator 2.375v v in 5.5v, 0.8v v out 5v, 9mm w 15mm w 2.32mm LTM4605/ltm4607 5a high effciency buck-boost dc/dc module regulators pin compatible with ltm4609, lower voltage versions of the ltm4609 ltm4606/ltm4612 ultralow noise dc/dc module regulators low emi, ltm4606 verifed by xilinx to power rocket io?, cispr22 compliant ltm4608a 8a, low v in , dc/dc module regulator 2.7v v in 5.5v, 0.6v v out 5v, 9mm w 15mm w 2.82mm ltm4627 20v, 15a dc/dc step-down module regulator 4.5v v in 20v, 0.6v v out 5v, pll input, v out tracking, remote sense amplifer, 15mm w 15mm w 4.32mm lga or 15mm w 15mm w 4.92mm bga p ackage p hotos r elate d p arts

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